SEED与SEED 560 仿真问题

2019-03-24 10:19发布

在开发DSP2812时出现 :SEED XDS560PLUS 能够正常运行。

SD XDS560V2 STM 提示出错:SC_ERR_CTL_NO_TRG_CLOCK

那位大侠能够指点
此帖出自小平头技术问答
友情提示: 此问题已得到解决,问题已经关闭,关闭后问题禁止继续编辑,回答。
该问题目前已经被作者或者管理员关闭, 无法添加新回复
2条回答
crusadelee
1楼-- · 2019-03-24 16:57
[Start]

Execute the command:

%ccs_base%/common/uscif/dbgjtag.exe -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity

[Result]


-----[Print the board config pathname(s)]------------------------------------

C:UsersADMINI~1AppDataLocal.TI2989677074
    0BrdDat estBoard.dat

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 560/2xx-class product.
This utility will load the program 'sd560v2u.out'.
The library build date was 'May 30 2012'.
The library build time was '23:17:26'.
The library package version is '5.0.747.0'.
The library component version is '35.34.40.0'.
The controller does not use a programmable FPGA.

An error occurred while hard opening the controller.

-----[An error has occurred and this utility has aborted]--------------------

This error is generated by TI's USCIF driver or utilities.

The value is '-181' (0xffffff4b).
The title is 'SC_ERR_CTL_NO_TRG_CLOCK'.

The explanation is:
The controller has detected a dead JTAG clock.
The user must turn-on or connect the JTAG clock for the target.

[End]
crusadelee
2楼-- · 2019-03-24 22:08
< :TI_MSP430_内容页_SA7 --> 发现JATG TCLK 的时钟500K只有200MV

一周热门 更多>

相关问题

    相关文章